The present invention relates to a precharging circuit for word lines of a memory system, in particular a memory system with programmable cells.
It is known that in high-density programmable memories a large part of the time necessary for reading is due to the time required to bring the selected word line to a level such as to allow the memory cell involved to conduct sufficient current to trip the sense amplifier. This is a mainly due to the long signal propagation time along the word line involved, characterized by high associated resistance and capacitance, especially if the material used for the word line is polysilicon. In particular, the access time brought about by the chip enable signal, which brings the memory system from a standby condition in which all the circuits in the system are disabled to an operational condition for reading of a datum, is long.
To reduce the access time to the memory cells, in particular in output from a standby condition, it was thought in the prior art to precharge all the word lines at the supply voltage (Vcc) of the memory during the standby phases while in the reading phase all the word lines except the directed one, which maintains high operating voltage, are grounded. In this case, before obtaining a correct reading, all the word lines except that one selected must fall below a voltage value lower than the threshhold of a virgin cell.
This solution, which is acceptable in many ways, has several drawbacks, however, especially if applied to high-density memories. Such drawbacks include the fact that (1) the current transient associated with the commutation of all the word lines can introduce noise on the grounded supply lines; (2) the capacitance which couples the substrate of the memory system and the word lines causes the substrate voltage to drop during commutation with the result that all the nodes coupled with the substrate are subject to a more or less serious disturbance; (3) the resistance of the substrate constitutes an appreciable contribution to the discharge time of the word lines when they commute all at once; indeed, the word lines can be schematized as an RC circuit in which R is equal to the parallel of the resistances of the strips of polysilicon making up the word lines plus the resistance of the substrate and of the substrate ground contact, and C is the sum of the capacitances of all the word lines to the substrate; and given the capacitance values involved (0.5 nF) the resistance of the substrate obviously cannot be overlooked; and ( 4) the capacitive coupling of all the word lines and of the doping strip N which makes up a bit line pushes the bit line to a negative potential in relation to ground during output of the standby phase. The PN junction (substrate) can thus be polarized directly, causing injection of minority carriers in the substrate with the danger of putting in conduction the bipolar parasites formed by bit line (N), substrate (P) and any nearby junctions N. These drawbacks have led certain manufacturers to avoid precharging the word lines, foregoing the related benefits in terms of access time.